Over many years and many projects, Viewpoint has developed a set of internal tools that provide the functionality required for these types of applications. While each application is different is some ways, the tools for shelling out the framework are by and large reusable.
When developing the various types of data acquisition systems, it is not uncommon to have requirements for deterministic task execution for tasks such as PID Closed Loop Control, Digital Communication, and other operations. Since Windows is not a platform we can use to attain true determinism, we often utilize the capabilities of a National Instruments RT (Real-time) Controller and/or FPGA device.
Since these applications require both host side (Windows) and the deterministic side (RT), there is an inherent need to bring the two together.
These tools encompass the following areas of need:
- TCP/IP Connectivity for Command/Data Transmission
- HOST side Data Recording and Circular Buffering for global data access.
- RT side Non-Priority Loops (NPL) for low priority activity (processing host commands, etc.)
- RT side Time Critical Loop (TCL) for the DAQ Read, Process, DAQ Write activity
The figure below shows a visual description of the connectivity between the components as well as some common activity performed in the various locations.
The essence of the architecture is the data vector, which can contain all data involved in the application, including, but not limited to:
- Analog Inputs/Outputs (Beginning of TCL)
- Calculated channels
- Digital Inputs/Outputs (End of TCL)
Some common tools we use in the RT layer include:
- E-STOP Monitoring
- Limit and Threshed Checking
- Watchdog Timers
- Function Generators
- PID Closed Loop Controls
Note: All of these items are evaluated typically at 1kHz, but higher speeds can be achieved and are application dependent.
When even higher speed determinism is required, we often incorporate FPGA devices into the system. Viewpoint has a library of IP that we regularly utilize for common tasks such as Frequency/Period Measurement, LVDT Demodulation, Digital De-bounce/Deglitch, Encoders, SPI, and custom UART interfaces, etc.
With an FPGA, the deterministic speed capability is significantly higher and results can be passed directly to the RT layer though DMA FIFOs.
On the host side, we have an equal set of companion tools to interface to the RT layer and manage the data for the host application. This includes:
- Circular Buffering of Data Vector
- Command Sets allowing direction of activity on the RT side and setting output values.
- Hardware Abstraction Layer for RT interfacing, as well as other, non-RT instrumentation such as DMM, Power Supply, and Environmental Chamber control.
- Data Recording with decimation.
- Diagnostic Panels with digital and chart presentation.
These tools provide an environment for rapid application development. While these tools can be used for any application approach, they are quite often utilized in conjunction with StepWise; a VSI platform for sequential test step execution and reporting.
Together, the StepWise platform, combined with the RT Toolset provide complimentary functionality for demanding custom test and measurement, control, and R&D applications.