NI FlexRIO enables Device Evaluation & Characterization for high-data-rate sub-system

NI FlexRIO enables Device Evaluation & Characterization for high-data-rate sub-system

100s of man-hours saved in capturing the data.

Client – Automotive Manufacturer

Challenge

New product development drove the need for validation of a new sub-system (a RADAR sensor ) for use in a next-gen system in an automobile. They needed a way to evaluate and characterize the performance of the component under various conditions that were not defined in the UUTs specs. They wanted to use as much COTS hardware as possible for this first run testing because of the expense of a custom test solution and the timeline.

Solution

The NI FlexRIO-based product validation system utilizes COTS hardware, along with some Viewpoint-developed custom software to allow for evaluation and characterization of the UUT.

Benefits

  • The utilization of COTs (vs a custom-built FPGA board) test hardware.
  • 100s of man-hours saved in capturing the data.
  • Allowed customer to manipulate captured data within the LabVIEW environment for more efficient testing, making changes on the fly.
  • Error Checking done at the FPGA Level allows for guaranteed valid transfers
  • Packet Decode completed at FPGA Level allows for real-time de-packetization for use in storing only payload data.
  • All Data captured with TDMS Files for use in over layering different scenarios.
  • Scalable to add additional serial data channels allowing for more than one sensor to be captured with a single FlexRIO card.

System Overview

NI’s FlexRIO with NI’s LVDS FAM was used.  The NI flying lead cable was utilized initially to connect to the UUT. On the software side custom VHDL was created to handle the 8b/10b serial stream data and clock recovery. The VHDL interfaced to LabVIEW FPGA which was utilized to stream the data to disk on the PXI-based system.

SOFTWARE FUNCTIONS
Custom FAM VHDL and LabVIEW FPGA interface Development
Aurora 8b/10b de-serialization and clock recovery
LVDS Buffering
Clock to Internal LabVIEW FPGA Clock
FIFOs for clock domain crossing and DMA
High Speed data streaming to Disk
LabVIEW RT for example Interface to FPGA
GUI
HARDWARE USED
NI FlexRIO
NI FlexRIO FAM – LVDS
NI LVDS to Flying lead cable
NI PXI Chassis and Controller
INTERFACES / PROTOCOLS
Aurora 8b/10b
TCP/IP
2018-08-27T16:43:43-05:00